First, the prior art disclosed in Japanese Laid-Open Patent Application No. Hei8-50672 (1996) is described as an example of art related to the present invention. The corresponding prior art relates to security thread identification equipment intended for various types of token-device media, wherein the equipment is designed so that metallic patterns consisting of character data and other data and embedded in token-device media can be electrically identified by detecting the metal(s). The equipment mentioned above is basically designed so that the forgery only of ordinary paper provided with advanced copying art is made difficult by inserting a metallic pattern into the information contained in the paper.
Next, the prior art disclosed in Japanese Laid-Open Patent Application No. Hei8-202844 (1996) is described. The corresponding prior art is for connecting semiconductor chips to a base substrate made of paper or synthetic paper, by using anisotropic electroconductive paste.
An embodiment of prior art is shown in FIG. 4. This embodiment indicates that there is crack 42 originating from chipping 41. Also, FIG. 4 implies that since pad 43 is located at the top of semiconductor chip 44, short-circuiting could result if electroconductive particles 46 inside adhesive resin 45 come into contact with the edge of the chip 44, and that since antenna 47 is located at the top of substrate 49, electroconductive particles 48 contribute to connection to the electrodes of the antenna 47.
Another embodiment of prior art is shown in FIG. 7, which indicates that since there exists a semiconductor chip equipped with both aluminum pad 73 and surface oxide film 74 on the surface of its device silicon layer 72, electroconductive particles 75 are distributed from adhesive resin 71, and that electroconductive particles 77 captured on the surface of gold pad 76 contribute to electrical continuity with antenna 78. Insulating material 79 is a passivation film. This figure shows the cross-sectional structure of a semiconductor chip connected using a conventional anisotropic electroconductive adhesive.
The present inventors consider that the prior art disclosed in Japanese Laid-Open Patent Application No. Hei8-50672 (1996) poses the following problem. That is to say, when preventive measures are to be taken against the forgery of various token-device media, the present inventors consider that in terms of technology, an added value exists in judging whether the forgery method is easy. In the above-mentioned embodiment of the prior art, therefore, although the sealing of metallic patterns in token-device media is described, this method not only facilitates pattern creation, but also has a risk close to recommending a method of forgery. Although forgery protection technology is for improving safety as its intended purpose, this technology enhances the reliability of forgery at the same time, and for this reason, forgery protection technology has the danger of no safeguards being provided against a high degree of forgery. It is to be deeply considered, therefore, that undeliberate forgery protection technology turns out to act as a forgery augmenter. In this case, referring to the technical level of metallic pattern creation, the present inventors consider it obvious that since the technology relates to the detection of metals, it is possible to analyze patternized information, even without using advanced technology, just by unsealing the medium and closely examining its contents. In other words, since the detection of metallic patterns is the requirement, its implementing method can be easily selected at a normal technical level.
Referring now to problems associated with Japanese Laid-Open Patent Application No. Hei8-202844 (1996), the present inventors consider that the corresponding art assumes paper and other thin media, not mere changes in materials, and that the mechanical strength of paper and the strength of semiconductor chips require even deeper studies. In this embodiment of the prior art, when a configuration with a thickness up to 100 microns is considered, whether problems arise depends greatly on whether no mechanical stresses are applied. That is to say, different restrictions must be defined to mount semiconductor chips on thin paper-form media. More specifically, the thickness and size of the semiconductor chips must be studied. For example, when examining whether a semiconductor chip 1 mm in size can withstand use at a normal operating level with paper 100 microns thick, one needs to study about whether the semiconductor chip can withstand use, not whether it can be structurally formed. The present inventors have considered that this conventional embodiment alone does not suffice to establish the realization style of practically usable thin media up to 100 microns thick.
Next, problems relating to the embodiment of prior art that is shown in FIG. 4 are described. During the processing of semiconductor chip periphery, since semiconductor chips that have been diced using a diamond blade are used, if external stresses are applied to the semiconductor chips and concentrated on the periphery thereof, the periphery will break or crack and some or all of the semiconductor chip functions will be lost. If these semiconductor chips are sealed in thin media such as paper, since bending or concentrated load stresses are prone to be applied, even a slight chipping (namely, a nick) around the semiconductor chips will result in their damage.
Next, problems relating to the embodiment of prior art that is shown in FIG. 7 are described. In this structural view, despite gold bumps existing, no consideration is given to the fact that side effects may be caused by the presence of the anisotropic electroconductive adhesive or electroconductive adhesive around the semiconductor chips. More specifically, no consideration is given to possible increases in the vertical dimensions of the structure due to the presence of the gold bumps, or to the likely occurrence of short circuits around the semiconductors. As a result, there exists the problem that the configuration of the semiconductor chips that includes the gold bumps makes the total structure of the equipment exceptionally thick and prevents bending-resistant structure from being achieved.